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Synthesis and VLSI Implementation of Very Low Power Consumption High Performance FIR Filters
11-May-2009 13:10 13:10
Age: 11 yrs


Synthesis and VLSI Implementation of Very Low Power Consumption High Performance FIR Filters

Résumé de la présentation :

Among the three constituent building blocks, namely, coefficient multiplier, adder, and delay, of a digital filter, the coefficient multiplier is not only consuming the most power but also the slowest and
occupying the largest area when implemented in silicon. Consequently, filters with very sparse coefficients are power efficient, fast, and area efficient. The frequency response masking (FRM) technique produces filters with very sparse coefficients - so sparse that the power consumed and areas occupied by the delays become significant. In this talk, the design of filters using the FRM technique as well as several implementation structures on VLSI for the delays will be presented. The talk will end with some discussions on unexplored implementation and computer aided design issues for the FRM structure.

Vous trouverez ci-dessous une présentation du Prof. Lim :

Lim Yong Ching received the A.C.G.I. and B.Sc. degrees in 1977 and the D.I.C. and Ph.D. degrees in 1980, all in electrical engineering, from Imperial College, London, U.K.
From 1980 to 1982, He was with the Naval Postgraduate School, California. From 1982 to 2003, he was with the Department of Electrical Engineering, National University of Singapore. Since 2003, he has been with the School of Electrical and Electronic Engineering, Nanyang Technological University. His research interests include digital signal processing and VLSI circuits and systems design.
Dr. Lim was a recipient of the 1996 IEEE Circuits and Systems Society's Guillemin-Cauer Best Paper Award, the 1990 IREE (Australia) Norman Hayes Memorial Best Paper Award, 1977 IEE (UK) Prize and the 1974-77 Siemens Memorial (Imperial College) Award.

Prof. Lim is a Fellow of IEEE. He served as a Distinguished Lecturer for the IEEE Circuits and Systems Society from 2001 to 2002 and as an associate editor for the IEEE Transactions on Circuits and Systems from 1991 to 1993 and from 1999 to 2001. He has also served as an associate editor for Circuits, Systems and Signal Processing from 1993 to 2000. He served as the Chairman of the DSP Technical Committee of the IEEE Circuits and Systems Society from 1998 to 2000. He served in the Technical Program Committee's DSP Track as the Chairman in IEEE ISCAS'97 and IEEE ISCAS'00 and as a Co-chairman in IEEE ISCAS'99. He is the General Chairman for IEEE APCCAS 2006 and a Co-General Chairman for IEEE ISCAS 2009.



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