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Large signal vector characterization and modeling of power transistors including memory effects
7-avril-2016 00:00 00:00
Il y a: 3 yrs

Prof. Patrick ROBLIN - jeudi 7 avril à 14h00 en salle 3103 à l'ESIEE

Abstract: This lecture will start by presenting an example of the extraction of nonlinear model for an SOS-MOSFET including memory effects using a single real-time active load–pull (RTALP) measurements.  The efficient phase sweeping of the RTALP drastically reduces the number of large-signal measurements needed for the model development and verification while maintaining the same intrinsic voltage coverage as in conventional passive or active load–pull systems. Memory effects associated with the parasitic bipolar junction transistor (BJT) in the SOS-MOSFET are accounted for by using a physical circuit topology for:
1) the intrinsic FET current–voltage characteristics;
2) the intrinsic charges of the FET; and 3) the BJT dc characteristics, all from the same modulated large-signal RF data. The bias dependence of the charges and IV characteristics are modeled using an artificial neural network (ANN).
The verification of the model is performed for load-lines, output power, power efficiency, and load–pull measurements, which are obtained using two additional independent RTALP measurements.  The application of this extraction method to the modeling of memory effects in GaN will then be discussed.  The importance of self-heating and the cyclostationary charging of traps in GaN HEMTs under large signal RF operation will then be reviewed.

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Dernière mise à jour : 13/02/2017